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Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
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Job Description
Job Description:
Join our dynamic FPGA (Field Programmable Gate Array) Business Unit as a Technical Staff SOC Architecture Engineer. We are at the forefront of developing SOC FPGA compute platforms for a diverse range of low-power applications, including smart embedded vision, industrial IoT, access/gateways/aggregation networks, and compute platforms for aerospace and defense. As an SOC Architect, you will collaborate with a team of highly motivated architects and senior designers to define and deliver next-generation, power-optimized FPGA solutions.
Key Responsibilities:
Lead technical diligence and perform trade-off analysis of product requirements during the Product Concept Phase, translating them into actionable Design Requirements for the Product Definition Phase.Collaborate with Embedded Software teams to define optimal Hardware Abstraction Layer (HAL) and driver interfaces, ensuring seamless integration and performance.Develop detailed microarchitectural specifications, ensuring accurate capture of design intent, identifying technical gaps, and proposing effective remedies.Drive RTL implementation and partner with Logic Verification and ASIC Implementation teams through synthesis and DFT insertion.Lead discussions with CPU and IP vendors to shape future features and requirements.Develop and utilize techniques and tools for SOC benchmarking and bandwidth analysis, delivering optimized system solutions.Work cross-functionally with Functional Verification, ASIC Implementation, and Embedded Software teams across multiple geographical locations.Oversee all facets of interconnect to FPGA fabric, associated peripherals, and IO resources, extending beyond the SOC boundary.Qualifications
Requirements/Qualifications:
Minimum Qualifications:
Master’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.10–15 years of industry experience in SOC architecture and design.Proven experience developing ARM M-Class or RISC-V Embedded SOC architectures.Expertise in SOC advanced interconnect, AMBA, SOC peripherals, and DDR memory.Proficiency in developing microarchitecture specifications, RTL design, and logic simulations.Hands-on experience with Verilog, Cadence/Synopsys/Siemens simulation environments, synthesis, and DFT insertion EDA tools.Strong scripting skills in CSH/BASH, PERL, or Python.Demonstrated adaptability and flexibility in a fast-paced, evolving environment.Excellent verbal and written communication skills, with the ability to convey complex technical concepts to cross-functional teams.Proactive problem-solving attitude and a willingness to take initiative in addressing technical challenges.
Preferred Qualifications:
Experience in SOC architecture performance analysis, tools, and simulators at various abstraction levels (Cycle Accurate, TLM, and/or Functional).Familiarity with UVM and functional coverage methodology.Experience with vector processing micro-architectures is a major plus.
Additional Information
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Handling, Hearing, Other, Seeing, Supervises Others, Talking, Works Alone, Works Around Others
Physical Requirements:
10% walking, 10% standing, 80% sitting; 100% in doors; Usual business hours
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip
The annual base salary range for this position, which could be performed in California, is $88,000 - $232,000.*
*Range is dependent on numerous factors including job location, skills and experience.
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
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