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• C

  Principal Analog Design Engineer  

  Celero Communications Inc.

  Any - San Jose

  Posted: 05/08/2026

  Apply Now

  Are you an Analog Design Engineer, who is seeking an amazing opportuni... Read More

  Are you an Analog Design Engineer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology powering next generation AI? We are looking for an Analog Design Engineer someone who is excited to join a fast-growing Start-Up Company growing a group of diverse individuals responsible for handling high-speed mixed-signal circuit designs!
  
  Candidate will have the opportunity to architect and design circuits for high performance transceivers and other critical analog functions.
  
  What You Will Do:
  
  High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.).
  Clock generation and distribution (VCOs, PLL, clock distribution, etc)
  Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc)
  New techniques for the development of next generation optical transceiver
  Design of custom passive components, from concept to silicon implementation
  Supervise analog layouts within advanced process nodes
  System verification and circuit design spec creation
  Silicon bring-up, debug and support
  Team communication and documentation
  
  What You Will Bring:
  
  Masters degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience.
  Should have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks.
  Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must
  Experience in advance cmos design and verification flows (tools to evaluate self-heating, electromigration, safe operating area)
  Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus
  Knowledge of the fundamentals on electromagnetism, lump models and high frequency design
  Good understanding of analog layouts in FinFet and its effect on high-speed designs is a plus
  Strong communication and documentation skills Read Less

  Apply Now
• C

  Principal SerDes Design Engineer  

  Celero Communications Inc.

  Any - San Jose

  Posted: 05/08/2026

  Apply Now

  We are looking for a SerDes Lead Designer, who is seeking an amazing o... Read More

  We are looking for a SerDes Lead Designer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI.
  
  Candidate will have the opportunity to architect and design SerDes for next generation transceivers.
  
  What You Will Do:
  
  Define architecture, specifications, and circuit topologies for next-generation SerDes
  Overview development of system-level modelling, with behavioral models (e.g., MATLAB, SystemVerilog, Verilog-A) to analyze link budgets, equalization strategies and jitter budgeting
  Design high-performance analog/mixed-signal circuits in advanced node technologies
  Develop and overview the design of critical blocks including RX/TX equalization (CTLE, DFE), High-speed PLLs, Phase interpolators, DLLs, TDCs
  Implement digitally assisted analog circuits, background calibration, and adaptive loops to improve Power, Performance, Area
  Oversee physical layout to minimize parasitics, device stress, electromigration and process variation impacts
  Overview of the analysis of Signal Integrity and Power Integrity to achieve system-defined targets
  Lead lab validation, debugging and characterization of SerDes IPs within our state-of-the-art lab
  Correlate silicon measurements with simulated data, and lead performance optimization in the system environment
  
  What You Will Bring:
  
  Masters degree and/or PhD in Electrical Engineering or related fields with 10+ years of relevant experience in SerDes design
  Proven record of taking high-speed SerDes design to tape-out and volume production
  Experience in lab bring-up, characterization, and debugging designs that reach out production
  Must have extensive experience with advanced node technologies (16nm/12nm, 7nm, 5nm, 3nm, 2nm processes)
  Prior experience in cross-functional interaction to deliver IP and ensuring seamless integration in SOCs
  Strong communication and documentation skills Read Less

  Apply Now

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